74HC_HCT3G07_15 Datasheet, PDF (2/14 Pages) NXP Semiconductors – Triple buffer with open-drain outputs

NXP Semiconductors
74HC3G07; 74HCT3G07
Triple buffer with open-drain outputs
4. Marking
Table 2. Marking code
Type number
74HC3G07DP
74HCT3G07DP
74HC3G07DC
74HCT3G07DC
74HC3G07GD
74HCT3G07GD
Marking code^[1]
H07
T07
H07
T07
H07
T07
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1A
1Y
2A
2Y
1
1A
1Y
1
2A
2Y
3A
3Y
001aah762
Fig 1. Logic symbol
1
3A
3Y
001aah763
Fig 2. IEC logic symbol
6. Pinning information
6.1 Pinning
Y
A
GND mna591
Fig 3. Logic diagram (one buffer)
74HC3G07
74HCT3G07
1A 1
3Y 2
2A 3
GND 4
8 V_CC
7 1Y
6 3A
5 2Y
001aak032
Fig 4. Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
74HC3G07
74HCT3G07
1A 1
3Y 2
8 V_CC
7 1Y
2A 3
6 3A
GND 4
5 2Y
001aak033
Transparent top view
Fig 5. Pin configuration SOT996-2 (XSON8)
74HC_HCT3G07
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 16 December 2013
© NXP B.V. 2013. All rights reserved.
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