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74HCT32N Datasheet, PDF (2/6 Pages) NXP Semiconductors – Quad 2-input OR gate | |||
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Philips Semiconductors
Quad 2-input OR gate
Product speciï¬cation
74HC/HCT32
FEATURES
⢠Output capability: standard
⢠ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT32 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT32 provide the 2-input OR function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/ tPLH
CI
CPD
propagation delay nA, nB to nY
input capacitance
power dissipation capacitance per gate
CL = 15 pF; VCC = 5 V
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD Ã VCC2 Ã fi + â (CL Ã VCC2 Ã fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
â (CL Ã VCC2 Ã fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC â 1.5 V
TYPICAL
UNIT
HC HCT
69
ns
3.5 3.5 pF
16 28 pF
ORDERING INFORMATION
See â74HC/HCT/HCU/HCMOS Logic Package Informationâ.
December 1990
2
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