74HCT04D Datasheet, PDF (2/17 Pages) NXP Semiconductors – Hex inverter

NXP Semiconductors
4. Functional diagram
74HC04; 74HCT04
Hex inverter
1 1A
3 2A
5 3A
9 4A
11 5A
13 6A
1Y 2
2Y 4
3Y 6
4Y 8
5Y 10
6Y 12
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Fig 1. Logic symbol
1
1
2
1
3
4
1
5
6
1
9
8
1
11
10
1
13
12
mna343
Fig 2. IEC logic symbol
5. Pinning information
A
Y
mna341
Fig 3. Logic diagram (one
inverter)
1A 1
1Y 2
2A 3
2Y 4
3A 5
3Y 6
GND 7
14 V_CC
13 6A
12 6Y
04
11 5A
10 5Y
9 4A
8 4Y
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terminal 1
index area
1Y 2
2A 3
2Y 4
3A 5
3Y 6
04
GND⁽¹⁾
13 6A
12 6Y
11 5A
10 5Y
9 4A
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Transparent top view
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
(1) The die substrate is attached to the exposed die pad
using conductive die attach material. It cannot be used
as a supply pin or input.
Fig 5. Pin configuration DHVQFN14
74HC_HCT04
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 3 August 2012
© NXP B.V. 2012. All rights reserved.
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