74HC643 Datasheet, PDF (2/6 Pages) NXP Semiconductors – Octal bus transceiver; 3-state; true/inverting

Philips Semiconductors
Octal bus transceiver; 3-state;
true/inverting
Product specification
74HC/HCT643
FEATURES
• Octal bidirectional bus interface
• True and inverting 3-state outputs
• Output capability: bus driver
• I_CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT643 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT643 are octal transceivers featuring true
and inverting 3-state bus compatible outputs in both send
and receive directions.
The “643” features an output enable (OE) input for easy
cascading and a send/receive (DIR) for direction control.
OE controls the outputs so that the buses are effectively
isolated.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
SYMBOL
PARAMETER
CONDITIONS
t_PHL/ ^tPLH
C_I
C_I/O
C_PD
propagation delay
A_n to B_n; inverting
B_n to A_n; true
input capacitance
C_L = 15 pF; V_CC = 5 V
input/output capacitance
power dissipation capacitance per transceiver notes 1 and 2
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
V_CC = supply voltage in V
2. For HC the condition is V_I = GND to V_CC
For HCT the condition is V_I = GND to V_CC −1.5 V
TYPICAL
HC
HCT
7
8
8
11
3.5
3.5
10
10
42
44
UNIT
ns
ns
pF
pF
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2