74HC640 Datasheet, PDF (2/6 Pages) NXP Semiconductors – Octal bus transceiver; 3-state; inverting

Philips Semiconductors
Octal bus transceiver; 3-state; inverting
Product specification
74HC/HCT640
FEATURES
• Octal bidirectional bus interface
• Inverting 3-state outputs
• Output capability: bus driver
• I_CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT640 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT640 are octal transceivers featuring
inverting 3-state bus compatible outputs in both send and
receive directions.
The “640” features an output enable (OE) input for easy
cascading and a send/receive (DIR) for direction control.
OE controls the outputs so that the buses are effectively
isolated. The “640” is similar to the “245” but has inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
SYMBOL
PARAMETER
CONDITIONS
t_PHL/ ^tPLH
C_I
C_I/O
C_PD
propagation delay
A_n to B_n;
B_n to A_n
input capacitance
input/output capacitance
power dissipation capacitance
per transceiver
C_L = 15 pF; V_CC = 5 V
notes 1 and 2
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
V_CC = supply voltage in V
2. For HC the condition is V_I = GND to V_CC
For HCT the condition is V_I = GND to V_CC − 1.5 V
TYPICAL
HC HCT
99
UNIT
ns
3.5 3.5 pF
10 10 pF
35 35 pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
March 1988
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