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74HC365 Datasheet, PDF (2/7 Pages) NXP Semiconductors – Hex buffer/line driver; 3-state | |||
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Philips Semiconductors
Hex buffer/line driver; 3-state
Product speciï¬cation
74HC/HCT365
FEATURES
⢠Non-inverting outputs
⢠Output capability: bus driver
⢠ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT365 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT365 are hex non-inverting buffer/line
drivers with 3-state outputs. The 3-state outputs (nY) are
controlled by the output enable inputs (OE1, OE2).
A HIGH on OEn causes the outputs to assume a high
impedance OFF-state.
The â365â is identical to the â366â but has non-inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
tPHL/ tPLH
CI
CPD
PARAMETER
CONDITIONS
TYPICAL
HC
HCT
propagation delay
nA to nY
CL = 15 pF; VCC = 5 V 9
11
input capacitance
3,5
3,5
power dissipation capacitance per buffer notes 1 and 2
40
40
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD Ã VCC2 Ã fi + â (CL Ã VCC2 Ã fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
â (CL Ã VCC2 Ã fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC â 1.5 V
UNIT
ns
pF
pF
ORDERING INFORMATION
See â74HC/HCT/HCU/HCMOS Logic Package Informationâ.
December 1990
2
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