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74HC280 Datasheet, PDF (2/7 Pages) NXP Semiconductors – 9-bit odd/even parity generator/checker
Philips Semiconductors
9-bit odd/even parity generator/checker
Product specification
74HC/HCT280
FEATURES
• Word-length easily expanded by cascading
• Similar pin configuration to the “180” for easy system
up-grading
• Generates either odd or even parity for nine data bits
• Output capability: standard
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT280 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT280 are 9-bit parity generators or checkers
commonly used to detect errors in high-speed data
transmission or data retrieval systems. Both even and odd
parity outputs are available for generating or checking
even or odd parity up to 9 bits.
The even parity output (∑E) is HIGH when an even number
of data inputs (I0 to I8) are HIGH. The odd parity output (∑0)
is HIGH when an odd number of data inputs are HIGH.
Expansion to larger word sizes is accomplished by tying
the even outputs (∑E) of up to nine parallel devices to the
data inputs of the final stage. For a single-chip 16-bit
even/odd parity generator/checker, see
PC74HC/HCT7080.
APPLICATIONS
• 25-line parity generator/checker
• 81-line parity generator/checker
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL PARAMETER
CONDITIONS
tPHL/ tPLH
CI
CPD
propagation delay
In to ∑E
In to ∑O
input capacitance
power dissipationcapacitance per package
CL = 15 pF; VCC = 5 V
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
TYPICAL
HC
HCT
UNIT
17
18
ns
20
22
ns
3.5
3.5
pF
65
65
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
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