74HC251 Datasheet, PDF (2/7 Pages) NXP Semiconductors – 8-input multiplexer; 3-state

Philips Semiconductors
8-input multiplexer; 3-state
Product specification
74HC/HCT251
FEATURES
• True and complement outputs
• Both outputs are 3-state for further multiplexer
expansion
• Multifunction capability
• Permits multiplexing from n-lines to one line
• Output capability: standard
• I_CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT251 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT251 are the logic implementations of
single-pole 8-position switches with the state of three
select inputs (S₀, S₁, S₂) controlling the switch positions.
Assertion (Y) and negation (Y) outputs are both provided.
The output enable input (OE) is active LOW. The logic
function provided at the output, when activated, is:
Y = OE.(I₀.S₀.S₁.S₂ + I₁.S₀.S₁.S₂ +
+ I₂.S₀.S₁.S₂ + I₃.S₀.S₁.S₂ +
+ I₄.S₀.S₁.S₂ + I₅.S₀.S₁.S₂ +
+ I₆.S₀.S₁.S₂ + I₇.S₀.S₁.S₂)
Both outputs are in the high impedance OFF-state (Z)
when the output enable input is HIGH, allowing multiplexer
expansion by tying the outputs.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
SYMBOL
PARAMETER
CONDITIONS
t_PHL/ t_PLH
C_I
C_PD
propagation delay
I_n to Y
I_n to Y
S_n to Y
S_n to Y
input capacitance
power dissipation capacitance per package
C_L = 15 pF; V_CC = 5 V
notes 1 and 2
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
V_CC = supply voltage in V
2. For HC the condition is V_I = GND to V_CC
For HCT the condition is V_I = GND to V_CC − 1.5 V
TYPICAL
HC
HCT
UNIT
15
19
ns
17
19
ns
20
20
ns
21
21
ns
3.5
3.5
pF
44
46
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
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