74HC158 Datasheet, PDF (2/7 Pages) NXP Semiconductors – Quad 2-input multiplexer; inverting

Philips Semiconductors
Quad 2-input multiplexer; inverting
Product specification
74HC/HCT158
FEATURES
• Inverting data path
• Output capability: standard
• I_CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT158 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT158 are quad 2-input multiplexers which
select 4 bits of data from two sources and are controlled by
a common data select input (S). The four outputs present
the selected data in the inverted form. The enable input (E)
is active LOW.
When E is HIGH, all the outputs (1Y to 4Y) are forced
HIGH regardless of all other input conditions.
Moving the data from two groups of registers to four
common output buses is a common use of the “158”. The
state of S determines the particular register from which the
data comes. It can also be used as a function generator.
The device is useful for implementing highly irregular logic
by generating any four of the 16 different functions of two
variables with one variable common.
The ”158” is the logic implementation of a 4-pole,
2-position switch, where the position of the switch is
determined by the logic levels applied to S.
The logic equations for the output are:
1Y = E.(1l₁.S + 1l₀.S)
2Y = E.(2l₁.S + 2l₀.S)
3Y = E.(3l₁.S + 3l₀.S)
4Y = E.(4l₁.S + 4l₀.S)
The “158” is identical to the “157” but has inverting outputs.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
SYMBOL
PARAMETER
CONDITIONS
t_PHL/ t_PLH
C_I
C_PD
propagation delay
nI₀, nI₁ to nY
E to nY
S to nY
input capacitance
power dissipation capacitance per multiplexer
C_L = 15 pF; V_CC = 5 V
notes 1 and 2
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
V_CC = supply voltage in V
2. For HC the condition is V_I = GND to V_CC
For HCT the condition is V_I = GND to V_CC − 1.5 V
TYPICAL
HC HCT
12
13
14
16
14
16
3.5 3.5
40
40
UNIT
ns
ns
ns
pF
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2