74HC14 Datasheet, PDF (2/8 Pages) NXP Semiconductors – Hex inverting Schmitt trigger

Philips Semiconductors
Hex inverting Schmitt trigger
Product specification
74HC/HCT14
FEATURES
• Output capability: standard
• I_CC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
SYMBOL PARAMETER
t_PHL/ t_PLH
C_I
C_PD
propagation delay nA to nY
input capacitance
power dissipation capacitance per gate
CONDITIONS
TYPICAL
HC
HCT
C_L = 15 pF; V_CC = 5 V 12
17
3.5
3.5
notes 1 and 2
7
8
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
C_L = output load capacitance in pF
V_CC = supply voltage in V
∑ (C_L × V_CC2 × f_o) = sum of outputs
2. For HC the condition is V_I = GND to V_CC
For HCT the condition is V_I = GND to V_CC − 1.5 V
UNIT
ns
pF
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
September 1993
2