74F723A Datasheet, PDF (2/14 Pages) NXP Semiconductors – Quad 2-to-1 data selector multiplexer 3-State

Philips Semiconductors
Multiplexers
Product specification
74F723A/74F723–1/
74F725A/74F725–1
74F723A Quad 3-to-1 Data Selector Multiplexer (3-State)
74F723-1 Quad 3-to-1 Data Selector Multiplexer with 30W Equivalent Output Termination Impedance (3-State)
74F725A Quad 4-to-1 Data Selector Multiplexer
74F725-1 Quad 4-to-1 Data Selector Multiplexer with 30W Equivalent Output Termination Impedance
FEATURES for 74F723A/74F723-1
• Consists of four 3-to-1 Multiplexers
• High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
• Inverting or non-inverting data path capability by an inverting (INV)
input
• Designed for address multiplexing of dynamic RAM and other
applications
• Multiple side pins for V_CC and GND to reduce lead inductance
(improves speed and noise immunity)
• 3-State outputs sink 64mA (74F723A only)
• 30W termination impedance on each output – 74F723-1
74F723-1 is the same as 74F723A except that it has a 30W
temination impedance on each output to reduce line noise and the
3-State outputs sink 5mA.
The 74F725A/74F725-1 consist of four 4-to1 multiplexers designed
for general multiplexing purpose. The select (S0, S1) inputs control
which line is to be selected, as defined in the Function Table for
74F725A/725-1. The outputs source 15mA and sink 64mA. The
74F725-1 is the same as the 74F725A except that it has a 30W
termination impedance on each output to reduce line noise and the
outputs sink 5mA.
TYPE
TYPICAL
PROPAGATION DELAY
74F723A
5.5ns
TYPICAL SUPPLY
CURRENT
(TOTAL)
25mA
FEATURES for 74F725A/74F725-1
• Consists of four 4-to-1 Multiplexers
• High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
• Equivalent to two 74F253s without 3-State
• Outputs sink 64mA (74F725A only)
• 30W termination impedance on each output – 74F725-1
DESCRIPTION
The 74F723A/74F723-1 consist of four 3-to-1 multiplexers designed
for address multiplexing of dynamic RAMs and other multiplexing
applications. Select (S0, S1) inputs control which line is to be
selected, as defined in the Function Table for 74F723A/74F723-1.
When the invering input (INV) is Low, the input data path is inverted.
74F723-1
74F725A
74F725-1
7.0ns
5.5ns
6.5ns
26mA
20mA
20mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V_CC = 5V ± 10%
T_amb = 0° C to +70°C
20-Pin Plastic Slim N74F723AN, N74F723-1N,
DIP (300 mil)
N74F725AN, N74F725-1N
24-Pin Plastic SOL
N74F723AD, N74F723-1D,
N74F725AD, N74F725-1D
PKG DWG
#
SOT222-1
SOT137-1
To improve speed and noise immunity, V_CC and GND side pins are
used. The 3-State outputs source 15mA and sink 64mA. The
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
TYPE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
Dna, Dnb, Dnc
Data inputs
1.0/0.066
74F723A/
74F723-1
S0, S1
OE
Select inputs
Output Enable input
1.0/0.033
1.0/0.033
INV
Output inverting input
1.0/0.033
74F723A
Q0 - Q3
Data outputs for 74F723A
750/106.7
74F723-1
Q0 - Q3
Data outputs for 74F723-1
750/8.33
74F725A/
74F725-1
Dna, Dnb, Dnc, Dnd Data inputs
S0, S1
Select inputs
1.0/0.066
1.0/0.033
74F725A
Q0 - Q3
Data outputs
750/106.7
74F725-1
Q0 - Q3
Data outputs
750/8.33
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE
HIGH/LOW
20µA/40µA
20µA/20µA
20µA/20µA
20µA/20µA
15mA/64mA
15mA/5mA
20µA/40µA
20µA/20µA
15mA/64mA
15mA/5mA
1990 Dec 13
2
853-1369 01257