74ABT845 Datasheet, PDF (2/7 Pages) NXP Semiconductors – 8-bit bus interface latch with set and reset 3-State

Philips Semiconductors
8-bit bus interface latch with set and reset
(3-State)
Product specification
74ABT845
LOGIC SYMBOL (IEEE/IEC)
LOGIC SYMBOL
1
&
2
EN
23
14
S2
11
R
13
C1
3
22
1D 2
4
21
5
20
6
19
7
18
8
17
9
16
10
15
SA00260
3 4 5 6 7 8 9 10
D0 D1 D2 D3 D4 D5 D6 D7
13
LE
14
PRE
11
MR
1
OE0
2
OE1
23
OE2
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
22 21 20 19 18 17 16 15
SA00259
FUNCTION TABLE
INPUTS
OUTPU
TS
OPERATING
MODE
OE PR
nE
MR
LE
Dn
Qn
LLXXX
H Preset
LH
L
X
X
L
Clear
LHHH L
LHH HH
L
H
Transparent
L
H
H
↓
l
LH
H
↓
h
L
H
Latched
HX X X X
Z
High impedance
LHH L X
NC Hold
LOGIC DIAGRAM
H=
h=
L=
l=
NC=
X=
Z=
↓=
High voltage level
High voltage level one set-up time prior to the High-to-Low LE
transition
Low voltage level
Low voltage level one set-up time prior to the High-to-Low LE
transition
No change
Don’t care
High impedance “off” state
High-to-Low transition
14
PRE
11
MR
D0
D1
D2
D3
D4
D5
D6
D7
3
4
5
6
7
8
9
10
P
D
LQ
C
P
D
LQ
C
P
D
LQ
C
P
D
LQ
C
P
D
LQ
C
P
D
LQ
C
P
D
LQ
C
P
D
LQ
C
13
LE
1
OE0
2
OE1
23
OE2
22
21
20
19
18
17
16
15
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
SA00261
1995 Sep 06
2