74ABT652A Datasheet, PDF (2/8 Pages) NXP Semiconductors – Octal transceiver/register, non-inverting 3-State

Philips Semiconductors
Octal transceiver/register, non-inverting (3-State)
Product specification
74ABT652A
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
4 5 6 7 8 9 10 11
A0 A1 A2 A3 A4 A5 A6 A7
23
CPBA
22
SBA
2
SAB
1
CPAB
OEAB
3
OEBA
21
B0 B1 B2 B3 B4 B5 B6 B7
20 19 18 17 16 15 14 13
SA00095
21
EN1 [BA]
3
EN2 [AB]
23
C4
22
G5
1
C6
2
G7
4
w1
5 4D
20
ʼn1
51
6D 7
17
w1
2ʼn
5
19
6
18
7
17
8
16
9
15
10
14
11
13
SA00096
FUNCTION TABLE
OEAB
OEBA
INPUTS
CPAB CPBA
SAB SBA
DATA I/O
An
Bn
OPERATING MODE
L
L
H
H or L H or L
X
X
H
↑
↑
X
X
Input
Input
Isolation
Store A and B data
X
H
H
H
↑
H or L
X
X
↑
↑
**
X
Input
Unspecified
output*
Store A, Hold B
Store A in both registers
L
L
X
H or L
↑
L
↑
↑
X
X
X Unspecified
**
output*
Input
Hold A, Store B
Store B in both registers
L
L
L
L
X
X
X
X
L
H or L
X
H
Output
Input
Real time B data to A bus
Stored B data to A bus
H
H
H
X
X
H
H or L
X
L
X
H
X
Input
Output
Real time A data to B bus
Store A data to B bus
H
L
H or L H or L
H
H
Output
Output
Stored A data to B bus
Stored B data to A bus
H=
L=
X=
↑=
*
**
High voltage level
Low voltage level
Don’t care
Low-to-High clock transition
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be
staggered in order to load both registers.
1995 Apr 19
2