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TDA8025 Datasheet, PDF (18/38 Pages) NXP Semiconductors – IC card interface
NXP Semiconductors
TDA8025
IC card interface
8.8 Deactivation sequence
When a session is completed, the microcontroller sets pin CMDVCCN to HIGH. The
circuit then executes an automatic deactivation sequence by counting the sequencer back
to the inactive state (see Figure 12 and Figure 13):
1. pin RST is pulled LOW (t11)
2. the clock is stopped, pin CLK is LOW (t12)
3. pins I/O, AUX1 and AUX2 are pulled LOW (t13)
4. VCC falls to zero (t14). The deactivation sequence is completed when VCC reaches its
inactive state
5. all card contacts become low-impedance to GND. However, pins I/OUC, AUX1UC and
AUX2UC remain pulled up to VDD(INTREGD) using the 11 kΩ resistor
6. The internal oscillator returns to its low frequency mode
Calculation of the time delays is as follows:
• t11 = t10 + 3T/64
• t12 = t11 + T/2
• t13 = t11 + T
• t14 = t11 + 3T/2
Remark: The value of period T is 64 times the period interval of the internal oscillator (i.e.
±25 µs).
CMDVCCN
RST
CLK
I/O
VCC
XTAL
OSCINT
high frequency
t10 t11
t12
t13
t14
tdeact
Fig 12. Deactivation sequence with a crystal oscillator
low frequency
001aai969
TDA8025_1
Product data sheet
Rev. 01 — 6 April 2009
© NXP B.V. 2009. All rights reserved.
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