SSTUA32866 Datasheet, PDF (18/27 Pages) NXP Semiconductors – 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications

Philips Semiconductors
SSTUA32866
1.8 V DDR2-667 configurable registered buffer with parity
11.2 Data output slew rate measurement information
V_DD = 1.8 V ± 0.1 V.
All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz; Z₀ = 50 Ω; input slew rate = 1 V/ns ± 20 %, unless otherwise specified.
DUT
V_DD
R_L = 50 Ω
OUT
C_L = 10 pF⁽¹⁾
test point
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(1) C_L includes probe and jig capacitance.
Fig 16. Load circuit, HIGH-to-LOW slew measurement
output
dv_f
80 %
20 %
dt_f
V_OH
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Fig 17. Voltage waveforms, HIGH-to-LOW slew rate measurement
DUT
OUT
C_L = 10 pF⁽¹⁾
(1) C_L includes probe and jig capacitance.
Fig 18. Load circuit, LOW-to-HIGH slew measurement
test point
R_L = 50 Ω
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dv_r
output
dt_r
80 %
20 %
V_OH
V_OL
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Fig 19. Voltage waveforms, LOW-to-HIGH slew rate measurement
9397 750 14759
Product data sheet
Rev. 01 — 15 July 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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