English
Language : 

SSL8516BT Datasheet, PDF (16/35 Pages) NXP Semiconductors – Greenchip PFC and flyback controller
NXP Semiconductors
SSL8516BT
Greenchip PFC and flyback controller
9VHQVH IE PD[
P9
)%6(16(
SHDNYROWDJH
3)&RII3)&RQ
IO\EDFN
)5PRGH
)%6(16(
RIIVHWYROWDJH
6(16(UHVLVWRU
SHDNYROWDJH
IO\EDFN
'&0RU45
P9
EXUVWPRGH




9)%&75/ 9
DDD
Fig 10. Flyback part peak current control
7.3.4 Demagnetization (FBAUX pin)
The system is always in QR or DCM. The internal oscillator does not start a new primary
stroke until the previous secondary stroke has ended.
Demagnetization features a cycle-by-cycle output short-circuit protection by immediately
lowering the frequency (longer off-time) and reducing the power level.
Demagnetization recognition is suppressed during the first tsup(xfmr_ring) time of 2.2 s.
This suppression can be necessary at low output voltages, during start-up and in
applications where the transformer has a large leakage inductance.
If the FBAUX pin is open-circuit or not connected, a fault condition is assumed and the
converter immediately stops. Operation restarts when the fault condition is removed.
7.3.5 Flyback control/time-out (FBCTRL pin)
The FBCTRL pin is connected to an internal voltage source of 7 V using an internal
13.2 k resistor. When VFBCTRL > 5.5 V, the resistor is disconnected. The pin is biased
with a 29 A current. When VFBCTRL > 7.75 V, a fault is assumed, switching is stopped and
a restart is made.
If a capacitor and resistor are connected in series to the pin, a time-out function is created
which protects against open control loop situations. See Figure 11 and Figure 12. The
time-out function is disabled by connecting a resistor (200 k) to ground on the FBCTRL
pin.
If the pin is short-circuited to ground, switching of the flyback controller is stopped.
Under normal operating conditions, the converter regulates the output voltage. VFBCTRL
varies between 0.77 V at minimum output power and 4.9 V at maximum output power.
SSL8516BT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 26 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
16 of 35