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SAF7118 Datasheet, PDF (159/173 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input
Philips Semiconductors
Multistandard video decoder with adaptive
comb filter and component video input
Product specification
SAF7118
16 PROGRAMMING START SET-UP
16.1 Decoder part
The given values force the following behaviour of the SAF7118 decoder part:
• The analog input AI11 expects an NTSC M, PAL B, D, G, H and I or SECAM signal in CVBS format; analog anti-alias
filter and AGC active
• Automatic field detection enabled
• Standard ITU 656 output format enabled on expansion (X) port
• Contrast, brightness and saturation control in accordance with ITU standards
• Adaptive comb filter for luminance and chrominance activated
• Pins LLC, LLC2, XTOUT, RTS0, RTS1 and RTCO are set to 3-state.
Table 140 Decoder part start set-up values for the three main standards
SUB
ADDRESS
(HEX)
REGISTER
FUNCTION
BIT NAME(1)
VALUES (HEX)
NTSC M
PAL B, D,
G, H AND I
SECAM
00
chip version
ID7 to ID4
read only
01
increment delay
X, WPOFF, GUDL1, GUDL0 and
IDEL3 to IDEL0
47
47
47
02
analog input control 1
FUSE1, FUSE0 and MODE5 to MODE0 C0
C0
C0
03
analog input control 2
X, HLNRS, VBSL, CPOFF, HOLDG,
10
10
10
GAFIX, GAI28 and GAI18
04
analog input control 3
GAI17 to GAI10
90
90
90
05
analog input control 4
GAI27 to GAI20
90
90
90
06
horizontal sync start
HSB7 to HSB0
EB
EB
EB
07
horizontal sync stop
HSS7 to HSS0
E0
E0
E0
08
sync control
AUFD, FSEL, FOET, HTC1, HTC0,
HPLL, VNOI1 and VNOI0
98
98
98
09
luminance control
BYPS, YCOMB, LDEL, LUBW and
LUFI3 to LUFI0
40
40
1B
0A
luminance brightness
DBRI7 to DBRI0
control
80
80
80
0B
luminance contrast
control
DCON7 to DCON0
44
44
44
0C
chrominance saturation DSAT7 to DSAT0
control
40
40
40
0D
chrominance hue control HUEC7 to HUEC0
00
00
00
0E
chrominance control 1 CDTO, CSTD2 to CSTD0, DCVF, FCTC, 89
81
D0
AUTO0 and CCOMB
0F
chrominance gain control ACGC and CGAIN6 to CGAIN0
2A
2A
80
10
chrominance control 2 OFFU1, OFFU0, OFFV1, OFFV0,
CHBW and LCBW2 to LCBW0
0E
06
00
11
mode/delay control
COLO, RTP1, HDEL1, HDEL0, RTP0
00
00
00
and YDEL2 to YDEL0
2004 Jul 22
159