TDA8415 Datasheet, PDF (15/19 Pages) NXP Semiconductors – TV and VTR stereo/dual sound processor with integrated filters and I2C-bus control

Philips Semiconductors
TV and VTR stereo/dual sound processor
with integrated filters and I²C-bus control
Preliminary specification
TDA8415
PARAMETER
CONDITIONS
SYMBOL
MIN.
TYP.
MAX. UNIT
AF stages and identification
(continued)
Signal suppression
during mute
note 6
SS
Change of output
DC voltages level
between any two
modes
70
75
−
−
−
dB
30
mV
Oscillator
Oscillator frequency
External oscillator
f_OSC
−
10
−
MHz
signal (RMS value)
Quartz series resistor
V_4-5
1.7
−
−
V
R1
−
−
100
Ω
Impedance
Capacitance
Z_i
C_OSC
−
−1.2 + j9.3 −
kΩ
−
1.7
−
pF
Notes to the characteristics
1. Full specification of I²C−bus will be supplied on request.
2. Programmable mute state. If the CR3 bit of the mute and port control register is LOW, the mute is active LOW; if it
is HIGH, the mute input is active HIGH.
3. Output current I_O ≈ 1 mA.
4. Unmodulated.
5. f = 400 Hz; R_L = 1 MΩ.
6. 40 Hz ≤ f ≤ 15 kHz.
7. In dual mode: A(B)-signal into B(A)-channel.
In stereo mode: R-signal into left, L-signal = 0, reference is 1 V RMS.
8. Source impedance |Z_S| < 1 kΩ.
9. Equivalent to an output level of −3 dB at f = 3.183 kHz.
10. V_o = 1 V RMS; f = 1 kHz.
11. Test circuit see Fig.7.
May 1989
15