TDA3618JR Datasheet, PDF (15/24 Pages) NXP Semiconductors – Multiple voltage regulator with switch and ignition buffers

Philips Semiconductors
Multiple voltage regulator with switch and
ignition buffers
Preliminary specification
TDA3618JR
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Ignition 2 buffer
V_OL
LOW-level output voltage I_IGN2OUT = 0 mA
0
0.2
0.8
V
V_OH
HIGH-level output voltage I_IGN2OUT = 0 mA
4.5 5.0
5.25
V
I_OL
LOW-level output current V_IGN2OUT ≤ 0.8 V
0.45 0.8
−
mA
I_OH
HIGH-level output current V_IGN2OUT ≥ 4.5 V
−0.45 −2.0
−
mA
I_LO
output leakage current
V_IGN2OUT = 5 V;
(source)
V_IGN2IN = 0 V
−
−
1.0
µA
t_PLH
LOW-to-HIGH
propagation time
V_IGN2IN rising from
1.7 to 2.5 V
−
−
500
µs
t_PHL
HIGH-to-LOW
propagation time
V_IGN2IN falling from
2.5 to 1.7 V
−
−
500
µs
Notes
1. Minimum operating voltage, only if V_P has exceeded 6.5 V.
2. The quiescent current is measured in the standby mode. Therefore, the enable inputs of regulators 1, 3 and the
power switch are grounded and R_L(REG2) = ∞ (see Fig.8).
3. The voltage of the regulator drops as a result of a V_P drop.
4. The rise and fall times are measured with a 10 kΩ pull-up resistor and a 50 pF load capacitor.
5. The delay time depends on the value of the capacitor:
t_d = _I--Cc---_h- × V_C(th) = C × (750 × 10³)[s]
6. The delay time depends on the value of the reset delay capacitor:
t_{d_high current} = _I--Cc---_h- × V_C(th)= C × (375 × 10³)[s]
7. The drop-out voltage of regulators 1, 2 and 3 is measured between V_P and REGn.
8. At current limit, I_REGmn is held constant (see Fig.6 for the behaviour of I_REGmn).
9. The foldback current protection limits the dissipated power at short circuit (see Fig.6).
10. The drop-out voltage measured between BU and REG2.
11. The drop-out voltage of the power switch is measured between V_P and SW.
12. The maximum output current of the switch is limited to 1.8 A when the supply voltage exceeds 18 V. A test mode is
built in. The delay time of the switch is disabled when a voltage of V_P + 1 V is applied to the switch-enable input.
13. At short circuit, I_sc of the power switch is held constant to a lower value than the continuous current after a delay of
at least 10 ms. A test-mode is built in. The delay time of the switch is disabled when a voltage of V_P + 1 V is applied
to the switch-enable input.
14. V_IGN1OUT = LOW for V_IGN1OUT > 1.2 V or V_EN1 > 1.3 V or V_EN3 > 1.3 V or V_ENSW > 1.3 V.
1999 Sep 01
15