PCD5002A Datasheet, PDF (15/48 Pages) NXP Semiconductors – Enhanced Pager Decoder for APOC1/POCSAG

Philips Semiconductors
Enhanced Pager Decoder for
APOC1/POCSAG
Product specification
PCD5002A
Table 10 Call terminator bit identification
BITS (MSB TO LSB)
FT
S3 to S1
DF
E3 to E1
IDENTIFICATION
forced call termination (1 = yes)
identifier number of last sync word
data fail mode indication (1 = data fail mode); note 1
detected error type; see Table 11; E3 = 0 in a call terminator
Note
1. The DF bit in the call terminator is set:
a) When any call data code-word in the terminating batch was uncorrectable, while in ‘data receive’ mode.
b) When the sync word at the start of the terminating batch did not match the standard POCSAG or a
user-programmed sync word, while in ‘data fail’ mode.
Table 11 Error type identification (note 1)
E3
E2
E1
ERROR TYPE
NUMBER OF ERRORS
0
0
0
no errors; correct code-word
0
0
0
1
parity bit in error
1
0
1
0
single bit error
1 + parity
0
1
1
single bit error and parity error
1
1
0
0
not used
−
1
0
1
4-bit burst error and parity error
3 (e.g. 1101)
1
1
0
2-bit random error
2
1
1
1
uncorrectable code-word
3 or more
Note
1. POCSAG code allows a maximum of three bit errors to be detected per code-word.
8.18 Error type indication
Table 11 shows how the different types of detected errors
are encoded in the call data output format.
8.19 Data transfer
Data transfer is initiated either during sync word periods or
as soon as the receiver is disabled after call termination.
If the SRAM buffer is full, data transfer is initiated
immediately during the next code-word.
When the PCD5002A is ready to transfer received call
data an external interrupt will be generated via output INT.
Any message data can be read by accessing the RAM
output register via the I²C-bus interface. Bytes will be
output starting from the position indicated by the RAM read
pointer.
Call termination can occur on reception of an address
code-word (or even a message code-word if in Enhanced
Call Termination Mode) or when a sync word is not
detected while in the ‘Data Fail’ mode (‘Short Fade
Recovery’ in APOC1).
8.20 Continuous data decoding
Apart from transmissions in the POCSAG or APOC1
format, the PCD5002A is also capable of decoding
continuous transmissions with the same code-word
structure. Any User-Programmable Sync Word (UPSW)
may be designated to enable continuous data decoding.
When a Continuous Data Decoding (CDD) sync word is
detected at any sync word position, the receiver remains
enabled from then on. Status bits D1 and D0 show the
CDD mode to be active.
All code-words are decoded and their data fields are
stored in SRAM. The usual error information is appended.
No distinction is made between address and message
code-words: code-word bit 0 is treated as a data bit and is
stored in bit M1 of the 3-byte output format.
1999 Jan 08
15