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74LVC1T45 Datasheet, PDF (15/30 Pages) NXP Semiconductors – Dual supply translating transceiver; 3-state
NXP Semiconductors
74LVC1T45; 74LVCH1T45
Dual supply translating transceiver; 3-state
Table 14. Measurement points
Supply voltage
Input[1]
VCC(A), VCC(B)
1.2 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 5.5 V
VM
0.5VCCI
0.5VCCI
0.5VCCI
Output[2]
VM
0.5VCCO
0.5VCCO
0.5VCCO
[1] VCCI is the supply voltage associated with the data input port.
[2] VCCO is the supply voltage associated with the output port.
VX
VOL + 0.1 V
VOL + 0.15 V
VOL + 0.3 V
VY
VOH − 0.1 V
VOH − 0.15 V
VOH − 0.3 V
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
VEXT
RL
RT
CL
RL
Test data is given in Table 15.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance.
VEXT = External voltage for measuring switching times.
Fig 8. Load circuitry for switching times
001aae331
Table 15. Test data
Supply voltage Input
VCC(A), VCC(B)
1.2 V to 5.5 V
VI[1]
VCCI
Δt/ΔV[2]
≤ 1.0 ns/V
Load
CL
15 pF
[1] VCCI is the supply voltage associated with the data input port.
[2] dV/dt ≥ 1.0 V/ns
[3] VCCO is the supply voltage associated with the output port.
RL
2 kΩ
VEXT
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ[3]
2VCCO
74LVC_LVCH1T45_2
Product data sheet
Rev. 02 — 19 January 2010
© NXP B.V. 2010. All rights reserved.
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