FI1216MF Datasheet, PDF (14/24 Pages) NXP Semiconductors – Desktop video tuner multi system CCIR L/L’ and B/G

Philips Components
Desktop video tuner
multi system CCIR L/L’ and B/G
Preliminary specification
FI1216MF MK2
APPLICATION INFORMATION
A detailed description of the I²C-bus specification, with applications, is given in brochure ‘‘The I²C-bus and how to
use it’’. This brochure may be ordered using the code number 9398 393 40011.
WRITE mode
BITS
BYTE
7
MSB
6
5
4
3
2
1
0
LSB
A⁽¹⁾
Address byte
1
1
0
0
0
MA1 MA0
0
A
Program divider byte 1
0
n14
n13
n12
n11
n10
n9
n8
A
Program divider byte 2
n7
n6
n5
n4
n3
n2
n1
n0
A
Control information byte 1
1
CP
T2
T1
T0
RSA RSB
OS
A
Control information byte 2 P7
P6
P5
P4
P3
P2
P1
P0
A
Note
1. A = Acknowledge.
ADDRESS SELECTION
V_S = +5 V (PLL supply voltage)
MA1
0
0
1
1
MA0
0
1
0
1
ADDRESS
C0
C2
C4
C6
VOLTAGE AT PIN 15 (see note 1)
0 to 0.1V_S
0.2 to 0.3V_S
0.4 to 0.6V_S
0.9V_S to V_S
Note
1. If the AS pin is left floating, the internal bias will automatically set the address to C2.
PROGRAMMABLE DIVIDER SETTINGS (BYTES 1 AND 2)
Divider ratio:
N = 16 × {f_RF(pc) + f_IF(pc)}, where (pc) is picture carrier and f_RF and f_IF are expressed in MHz
f_osc = ^N⁄₁₆ (MHz).
N = (8192 × n13) + (4096 × n12) + (2048 × n11) + (1024 × n10) + (512 × n9) + (256 × n8) + (128 × n7) + (64 × n6) +
(32 × n5) + (16 × n4) + (8 × n3) + (4 × n2) + (2 × n1) + n0
CONTROL BYTE
Charge pump settings:
CP = 1, for fast tuning
CP = 0, for moderate speed tuning with slightly better residual oscillator FM.
Test mode settings:
T2 = T1 = 0; T0 = 1, for normal operation.
PLL disabling:
OS = 0, for normal operation
OS = 1, for switching the charge pump to the high impedance state.
1996 Jul 09
14