BLF8G24LS-100V_15 Datasheet, PDF (14/17 Pages) NXP Semiconductors – Power LDMOS transistor

NXP Semiconductors
BLF8G24LS-100(G)V
Power LDMOS transistor
9. Handling information
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
10. Abbreviations
Table 10. Abbreviations
Acronym
Description
3GPP
3rd Generation Partnership Project
CCDF
Complementary Cumulative Distribution Function
CW
Continuous Wave
DPCH
Dedicated Physical CHannel
ESD
ElectroStatic Discharge
IS-95
Interim Standard 95
LDMOS
Laterally Diffused Metal Oxide Semiconductor
MTF
Median Time to Failure
PAR
Peak-to-Average Ratio
SMD
Surface Mounted Device
VBW
Video BandWidth
VSWR
Voltage Standing Wave Ratio
W-CDMA
Wideband Code Division Multiple Access
11. Revision history
Table 11. Revision history
Document ID
BLF8G24LS-100V_24LS-100GV v.3
Modifications
BLF8G24LS-100V_24LS-100GV v.2
BLF8G24LS-100V_24LS-100GV v.1
Release date Data sheet status
20140627
Product data sheet
• Table 1 on page 1: table updated
• Table 7 on page 3: table updated
20140228
Objective data sheet
20131104
Objective data sheet
Change notice
-
Supersedes
BLF8G24LS-100V_
24LS-100GV v.2
-
BLF8G24LS-100V_
24LS-100GV v.1
-
-
BLF8G24LS-100V_24LS-100GV
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 27 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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