74HC_HCT299_15 Datasheet, PDF (14/24 Pages) NXP Semiconductors – 8-bit universal shift register; 3-state

NXP Semiconductors
[6] C_PD is used to determine the dynamic power dissipation (P_D in µW).
P_D = C_PD × V_CC2 × f_i × N + Σ(C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz;
f_o = output frequency in MHz;
Σ(C_L × V_CC2 × f_o) = sum of outputs;
C_L = output load capacitance in pF;
V_CC = supply voltage in V;
N = number of inputs switching.
11. Waveforms
74HC299; 74HCT299
8-bit universal shift register; 3-state
V_I
I/On, DSR, DSL
inputs
GND
V_I
CP input
GND
V_OH
I/On, Q0, Q7
outputs
V_OL
V_M
t_h
t_su
1/f_max
V_M
t_W
t_PHL
V_M
t_THL
t_h
t_su
t_PLH
t_TLH
001aai462
Fig 7.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Clock pulse to outputs I/On, Q0, Q7 propagation delays, the clock pulse width, the I/On, DSR and DSL to
clock pulse set-up and hold times, the output transition times and the maximum clock frequency
74HC_HCT299_3
Product data sheet
Rev. 03 — 28 July 2008
© NXP B.V. 2008. All rights reserved.
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