SAA4945H Datasheet, PDF (13/20 Pages) NXP Semiconductors – LIne MEmory noise Reduction IC LIMERIC

Philips Semiconductors
LIne MEmory noise Reduction IC
(LIMERIC)
Preliminary specification
SAA4945H
Status register
Table 15 Status register usage
USE
Purpose
Address
Read/write
internal settings
F4
write
ACTION
Table 16 Status register content
MSB
Tctrl3
Tctrl2
Tctrl1
X
ExThr
Wv
DEM
LSB
WES
Table 17 Status register description
BIT NAME
DESCRIPTION
0 WES Write Enable Select
0: data coincides with write enable (both input and output)
1: data is delayed over one clock period with respect to the write enable (both input and output)
see Fig.4
1 DEM Demo Mode
0: demo mode disabled
1: demo mode on; the noise reduction circuit is switched on for the left half of the screen - the noise
reduction is disabled (split screen function) for the right half of the screen
2 Wv Weave
0: enable weave
1: disable weave
3 ExThr External Threshold control bit
0: N_thr calculated by noise estimator
1: value of N_thr from register F9 is used
4X
don’t care
5 Tctrl1 Test control 1
0: normal operation
1: test mode
6 Tctrl2 Test control 2
0: normal operation
1: test mode
5 Tctrl3 Test control 3
0: normal operation
1: test mode
1997 Jun 10
13