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74LVC_LVCH2T45_15 Datasheet, PDF (13/36 Pages) NXP Semiconductors – Dual supply translating transceiver; 3-state
NXP Semiconductors
74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
Table 12. Dynamic characteristics for temperature range 40 C to +85 C …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8.
Symbol Parameter
Conditions
VCC(B)
Unit
1.5 V  0.1 V 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V
Min Max Min Max Min Max Min Max Min Max
tPLZ
LOW to OFF-state DIR to A
propagation delay DIR to B
1.4 3.7 1.4 3.7 1.3 3.7 1.0 3.7 0.9 3.7 ns
2.3 13.1 2.4 12.1 1.9 7.4 2.3 7.0 1.8 4.5 ns
tPZH
OFF-state to HIGH DIR to A [1] - 23.6 - 18.9 - 12.2 - 11.4 - 8.4 ns
propagation delay DIR to B [1] - 20.3 -
18.8 - 11.2 -
9.1
-
7.6 ns
tPZL
OFF-state to LOW DIR to A [1] - 28.1 - 23.1 - 14.3 - 12.0 - 9.2 ns
propagation delay DIR to B [1] - 20.7 -
17.6 - 11.6 -
9.9
-
8.9 ns
[1] tPZH and tPZL are calculated values using the formula shown in Section 14.4 “Enable times”.
Table 13. Dynamic characteristics for temperature range 40 C to +125 C
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8.
Symbol Parameter
Conditions
VCC(B)
Unit
1.5 V  0.1 V 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V
Min Max Min Max Min Max Min Max Min Max
VCC(A) = 1.4 V to 1.6 V
tPLH
LOW to HIGH
propagation delay
A to B
B to A
2.5 23.5 2.1 19.4 1.8 14.9 1.5 13.0 1.4 11.6 ns
2.5 23.5 2.3 21.1 2.0 16.4 2.0 13.7 1.9 13.2 ns
tPHL
HIGH to LOW
A to B
propagation delay B to A
2.3 21.3 1.9 16.9 1.6 13.0 1.5 12.0 1.5 11.9 ns
2.3 21.3 2.1 19.1 2.0 14.6 1.9 12.5 2.0 12.1 ns
tPHZ
HIGH to OFF-state DIR to A
propagation delay DIR to B
2.7 20.6 2.7 20.6 2.7 20.6 2.7 20.6 2.7 20.6 ns
3.1 27.3 3.1 26.0 2.7 12.1 2.9 12.5 2.5 11.4 ns
tPLZ
LOW to OFF-state DIR to A
propagation delay DIR to B
2.1 12.6 2.1 12.6 2.1 12.6 2.1 12.6 2.1 12.6 ns
2.5 20.2 2.7 19.0 2.2 10.4 2.7 11.2 2.2 10.4 ns
tPZH
OFF-state to HIGH DIR to A [1] - 43.7 - 40.1 - 26.8 - 24.9 - 23.6 ns
propagation delay DIR to B [1] - 36.1
-
32.0
- 27.5 - 25.6 - 24.2 ns
tPZL
OFF-state to LOW DIR to A [1] - 48.6 - 45.1 - 26.7 - 25.0 - 23.5 ns
propagation delay DIR to B [1] - 41.9
-
37.5
- 33.6 - 32.6 - 32.5 ns
VCC(A) = 1.65 V to 1.95 V
tPLH
LOW to HIGH
propagation delay
A to B
B to A
2.3 21.1 1.9 19.5 1.9 10.3 1.5 8.0 1.2 7.5 ns
2.1 19.4 1.9 19.5 2.0 17.6 1.8 17.1 1.7 16.7 ns
tPHL
HIGH to LOW
A to B
propagation delay B to A
2.1 19.1 1.8 15.8 1.4 9.4 1.6 7.9 1.5 7.7 ns
1.9 16.9 1.8 15.8 1.8 14.2 1.8 13.9 1.6 13.5 ns
tPHZ
HIGH to OFF-state DIR to A
propagation delay DIR to B
2.6 18.9 2.6 18.9 2.6 18.9 2.6 18.9 2.6 18.9 ns
2.8 26.6 2.8 24.1 2.4 12.7 2.7 11.4 2.2 9.1 ns
tPLZ
LOW to OFF-state DIR to A
propagation delay DIR to B
2.1 11.6 2.1 11.6 2.1 11.6 2.1 11.6 2.1 11.6 ns
2.2 19.4 2.3 17.6 1.9 10.2 2.4 9.3 2.1 7.9 ns
tPZH
OFF-state to HIGH DIR to A [1] - 38.8 - 37.1 - 27.8 - 26.4 - 24.6 ns
propagation delay DIR to B [1] - 32.7
-
31.1
- 21.9 - 19.6 - 19.1 ns
74LVC_LVCH2T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 29 March 2013
© NXP B.V. 2013. All rights reserved.
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