74HC164 Datasheet, PDF (13/24 Pages) NXP Semiconductors – 8-bit serial-in/parallel-out shift register

Philips Semiconductors
74HC164; 74HCT164
8-bit serial-in, parallel-out shift register
9397 750 14693
Product data sheet
Table 10: Dynamic characteristics for 74HCT164
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF; test circuit see Figure 10; unless otherwise specified
Symbol Parameter
Conditions
Min
Typ
Max
T_amb = 25 °C
t_PHL, t_PLH propagation delay
CP to Qn
V_CC = 4.5 V;
see Figure 7
-
17
36
t_PHL
propagation delay
MR to Qn
V_CC = 4.5 V;
see Figure 8
-
19
38
t_THL, t_TLH output transition time
V_CC = 4.5 V;
see Figure 7
-
7
15
t_W
clock pulse width;
V_CC = 4.5 V;
HIGH or LOW
see Figure 7
18
7
-
master reset pulse width; V_CC = 4.5 V;
LOW
see Figure 8
18
10
-
t_rem
removal time MR to CP V_CC = 4.5 V;
see Figure 8
16
7
-
t_su
set-up time
V_CC = 4.5 V;
DSA, and DSB to CP see Figure 9
12
6
-
t_h
hold time DSA, and DSB V_CC = 4.5 V;
to CP
see Figure 9
+4
−2
-
f_max
maximum clock pulse V_CC = 4.5 V;
frequency
see Figure 7
27
55
-
T_amb = −40 °C to +85 °C
t_PHL, t_PLH propagation delay
CP to Qn
V_CC = 4.5 V;
see Figure 7
-
-
45
t_PHL
propagation delay
MR to Qn
V_CC = 4.5 V;
see Figure 8
-
-
48
t_THL, t_TLH output transition time
V_CC = 4.5 V;
see Figure 7
-
-
19
t_W
clock pulse width;
V_CC = 4.5 V;
HIGH or LOW
see Figure 7
23
-
-
master reset pulse width; V_CC = 4.5 V;
LOW
see Figure 8
23
-
-
t_rem
removal time MR to CP V_CC = 4.5 V;
see Figure 8
20
-
-
t_su
set-up time
V_CC = 4.5 V;
DSA, and DSB to CP see Figure 9
15
-
-
t_h
hold time DSA, and DSB V_CC = 4.5 V;
to CP
see Figure 9
4
-
-
f_max
maximum clock pulse V_CC = 4.5 V;
frequency
see Figure 7
22
-
-
T_amb = −40 °C to +125 °C
t_PHL, t_PLH propagation delay
CP to Qn
V_CC = 4.5 V;
see Figure 7
-
-
54
t_PHL
propagation delay
MR to Qn
V_CC = 4.5 V;
see Figure 8
-
-
57
t_THL, t_TLH output transition time
V_CC = 4.5 V;
see Figure 7
-
-
22
Unit
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
Rev. 03 — 4 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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