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74HC_HCT3G14_15 Datasheet, PDF (12/21 Pages) NXP Semiconductors – Triple inverting Schmitt trigger | |||
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NXP Semiconductors
74HC3G14; 74HCT3G14
Triple inverting Schmitt trigger
14. Application information
The slow input rise and fall times cause additional power dissipation, which can be
calculated using the following formula:
Padd = fi ï´ (tr ï´ ïICC(AV) + tf ï´ ïICC(AV)) ï´ VCC where:
Padd = additional power dissipation (ïW);
fi = input frequency (MHz);
tr = input rise time (ns); 10 % to 90 %;
tf = input fall time (ns); 90 % to 10 %;
ïICC(AV) = average additional supply current (ïA).
ïICC(AV) differs with positive or negative input transitions, as shown in Figure 12 and
Figure 13.
An example of a relaxation circuit using the 74HC3G14/74HCT3G14 is shown
in Figure 14.
200
ÎICC(AV)
(μA)
150
100
mna036
positive-going
edge
50
0
0
2.0
linear change of VI between 0.1VCC to 0.9VCC.
Fig 12. ïICC(AV) as a function of VCC for 74HC3G14
negative-going
edge
4.0
6.0
VCC (V)
74HC_HCT3G14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 â 9 December 2013
© NXP B.V. 2013. All rights reserved.
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