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| 74AUP2G80 Datasheet, PDF (12/18 Pages) NXP Semiconductors – Low-power dual D-type flip-flop; positive-edge trigger | |||
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Philips Semiconductors
74AUP2G80
Low-power dual D-type ï¬ip-ï¬op; positive-edge trigger
VCC
VEXT
5 kâ¦
PULSE
VI
GENERATOR
VO
DUT
RT
CL
RL
001aac521
Test data is given in Table 10.
Deï¬nitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9. Load circuitry for switching times
Table 10. Test data
Supply voltage
Load
VCC
0.8 V to 3.6 V
CL
RL[1]
5 pF, 10 pF, 15 pF and 30 pF 5 k⦠or 1 Mâ¦
VEXT
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ
2 Ã VCC
[1] For measuring enable and disable times RL = 5 kâ¦, for measuring propagation delays, setup and hold times and pulse width RL = 1 Mâ¦.
74AUP2G80_1
Product data sheet
Rev. 01 â 25 August 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
12 of 18
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