SAA7374 Datasheet, PDF (11/60 Pages) NXP Semiconductors – Low voltage digital servo processor and Compact Disc decoder CD7LV

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SUBCODE
PROCESSOR
output from
data slicer
DIGITAL PLL AND
DEMODULATOR
FIFO
ERROR
CORRECTOR
1
V4
0
0 : reg D = xx01
V4 SUBCODE
INTERFACE
CD GRAPHICS
INTERFACE
reg F
SBSY
SFSY
SUB
MICROCONTROLLER
INTERFACE
SDA
1 : reg A = xx0x
0 : reg A = xx1x
1
0
1 : reg 3 = xx10
(1fs mode)
0 : reg 3 ≠ xx10
FADE/MUTE/
INTERPOLATE
1
PHASE
DIGITAL
0
COMPENSATION
FILTER
reg 3
KILL
KILL
V3
reg C
DE-EMPHASIS
FILTER
EBU
INTERFACE
reg A
DOBM
1 : no pre-emphasis detected
OR reg D = 01xx (de-emphasis signal at V5)
0 : pre-emphasis detected
AND reg D ≠ 01xx
1
0
1
0
1
0
I²S-BUS
INTERFACE
SCLK
WCLK
DATA
EF
1 : reg 3 ≠ 101x
reg 3
0 : reg 3 = 101x
(CD-ROM modes)
MBG418
Fig.6 Simplified data flow of decoder functions.