P89LPC915 Datasheet, PDF (11/72 Pages) NXP Semiconductors – 8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V Flash with 8-bit A/D converter

Philips Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
Table 4: P89LPC916 pin description…continued
Symbol
Pin
Type Description
P1.0 to P1.5
I/O
(P1.2);
I (P1.5)
Port 1: Port 1 is a 5-bit I/O port with user-configurable outputs. During reset Port 1
latches are configured in the input only mode with the internal pull-up disabled. The
operation of the P1.2 input and outputs depends upon the port configuration selected.
Refer to Section 9.12.1 “Port configurations” and Table 13 “DC electrical
characteristics” for details. P1.2 is an open drain when used as an output. P1.5 is
input only.
All pins have Schmitt triggered inputs.
Port 1 also provides various special functions as described below:
10
I/O
P1.0 — Port 1 bit 0
O
TxD — Serial port transmitter data.
9
I/O
P1.1 — Port 1 bit 0
I
RxD — Serial port receiver data.
8
I/O
P1.2 — Port 1 bit 2. (Open drain when used as an output.)
I/O
T0 — Timer/counter 0 external count input, overflow output, or PWM output.
I/O
SCL — I²C-bus serial clock input/output.
7
I/O
P1.3 — Port 1 bit 2. (Open drain when used as an output.)
I/O
INT0 — External interrupt 0 input.
I/O
SDA — I²C-bus serial data input/output.
3
I
P1.5 — Port 1 bit 5. (Input only.)
I
RST — External Reset input during power-on or if selected via UCFG1. When
functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O
ports and peripherals to take on their default states, and the processor begins
execution at address 0. When using an oscillator frequency above 12 MHz, the
reset input function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until V_DD has reached its specified level.
When system power is removed V_DD will fall below the minimum specified
operating voltage. When using an oscillator frequency above 12 MHz, in some
applications, an external brownout detect circuit may be required to hold the
device in reset when V_DD falls below the minimum specified operating voltage.
Also used during a power-on sequence to force In-System Programming mode.
9397 750 14397
Product data
Rev. 04 — 17 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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