TDA8764 Datasheet, PDF (10/28 Pages) NXP Semiconductors – 10-bit high-speed low-power ADC with internal reference regulator

Philips Semiconductors
10-bit high-speed low-power ADC with
internal reference regulator
Preliminary specification
TDA8764
SYMBOL
PARAMETER
Switching characteristics
CLOCK INPUT; CLK; see Fig.5; note 1
f_clk(max)
maximum clock frequency
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
t_CPH
clock pulse width HIGH
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
t_CPL
clock pulse width LOW
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
Analog signal processing
LINEARITY
INL
integral non-linearity
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
DNL
differential non-linearity
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
E_offset
E_G
offset error
gain error (from device to device)
using internal reference voltage
BANDWIDTH (f_clk = 40 MHZ)/4 VERSION;
B
analog bandwidth
t_stLH
analog input settling time
LOW-to-HIGH
t_stHL
analog input settling time
HIGH-to-LOW
CONDITIONS
MIN.
40
80
7
5
7
5
f_clk = 40 MHz; ramp input
−
f_clk = 80 MHz; ramp input
−
f_clk = 40 MHz; ramp input
−
f_clk = 80 MHz; ramp input
−
middle code
−
note 5
−
full-scale sine wave; note 6 −
75% full-scale sine wave; −
note 6
small signal at mid-scale; −
V_I = ±10 LSB at code 512;
note 6
full-scale square wave;
−
see Fig.7 and note 7
full-scale square wave;
−
see Fig.7 and note 7
TYP. MAX. UNIT
−
−
MHz
−
−
MHz
−
−
ns
−
−
ns
−
−
ns
−
−
ns
±0.8 tbf
LSB
±0.8 tbf
LSB
±0.25 tbf
LSB
±0.25 tbf
LSB
±1
−
LSB
tbf
−
%
20
−
30
−
350 −
MHz
MHz
MHz
tbf
tbf
ns
tbf
tbf
ns
1999 Jan 12
10