PCF8583T Datasheet, PDF (10/37 Pages) NXP Semiconductors – Clock and calendar with 240 x 8-bit RAM

NXP Semiconductors
PCF8583
Clock and calendar with 240 x 8-bit RAM
MSB
LSB
7 654 321 0
013aaa374
Fig 10. Alarm control registers, clock mode
memory location 08h
reset state: 0000 0000
timer function:
000
no timer
001
hundredths of a second
010
seconds
011
minutes
100
hours
101
days
110
not used
111
test mode, all counters
in parallel (factory use only)
timer interrupt enable:
0
timer flag, no interrupt
1
timer flag, interrupt
clock alarm function:
00
no clock alarm
01
daily alarm
10
weekday alarm
11
dated alarm
timer alarm enable:
0
no timer alarm
1
timer alarm
alarm interrupt enable:
(only valid when alarm enable in
the control and status register is set)
0
alarm flag, no interrupt
1
alarm flag, interrupt
7.6 Alarm registers
All alarm registers are allocated with a constant address offset of 08h to the
corresponding counter registers (see Figure 9).
An alarm signal is generated when the contents of the alarm registers match bit-by-bit the
contents of the involved counter registers. The year and weekday bits are ignored in a
dated alarm. A daily alarm ignores the month and date bits. When a weekday alarm is
selected, the contents of the alarm weekday and month register selects the weekdays on
which an alarm is activated (see Figure 11).
Remark: In the 12 hour mode, bits 6 and 7 of the alarm hours register must be the same
as the hours counter.
PCF8583
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 06 — 6 October 2010
© NXP B.V. 2010. All rights reserved.
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