NPIC6C596_15 Datasheet, PDF(10/21 Page) NXP Semiconductors – Power logic 8-bit shift register; open-drain outputs

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NPIC6C596_15 Datasheet, PDF (10/21 Pages) NXP Semiconductors – Power logic 8-bit shift register; open-drain outputs

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NXP Semiconductors

NPIC6C596

Power logic 8-bit shift register; open-drain outputs

SHCP input

GND

VOH

Q7S output

VOL

1/fmax

tPLH

tPHL

aaa-002558

Measurement points are given in Table 7.

VOL and VOH are the typical output voltage levels that occur with the output load.

Fig 11. The shift clock (SHCP) to serial data output (Q7S) propagation delays with the minimum shift clock pulse

width and maximum shift clock frequency

Table 7. Measurement points

Supply voltage

Input

VCC

0.5VCC

Output

0.5VDS

0.1VDS

0.9VDS

SHCP input

GND

DS input

GND

tsu

VOH

Q7S output

VOL

aaa-002559

Measurement points are given in Table 8.

The shaded areas indicate when the input is permitted to change for predictable output performance.

VOL and VOH are the typical output voltage levels that occur with the output load.

Fig 12. The data set-up and hold times for the serial data input (DS)

Table 8. Measurement points

Supply voltage

VCC

NPIC6C596

Product data sheet

Input

0.5VCC

All information provided in this document is subject to legal disclaimers.

Rev. 2 â 4 July 2013

Output

0.5VCC

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