English
Language : 

83C654 Datasheet, PDF (10/24 Pages) NXP Semiconductors – CMOS single-chip 8-bit microcontroller
Philips Semiconductors
CMOS single-chip 8-bit microcontroller
Product specification
83C654
DC ELECTRICAL CHARACTERISTICS
VSS = 0V, VDD = 5V ± 10%
TEST
LIMITS
SYMBOL
PARAMETER
PART TYPE
CONDITIONS
MIN.
MAX.
UNIT
VIL
VIL1
VIL2
VIH
VIH1
VIH2
VOL
VOL1
VOL2
VOH
VOH1
IIL
Input low voltage,
except EA, P1.6/SCL, P1.7/SDA
Input low voltage to EA
Input low voltage to P1.6/SCL, P1.7/SDA6
Input high voltage, except XTAL1, RST,
P1.6/SCL, P1.7/SDA
Input high voltage, XTAL1, RST
Input high voltage, P1.6/SCL, P1.7/SDA6
Output low voltage, ports 1, 2, 3,
except P1.6/SCL, P1.7/SDA
Output low voltage, port 0, ALE, PSEN
Output low voltage, P1.6/SCL, P1.7/SDA
Output high voltage, ports 1, 2, 3, ALE, PSEN10
0 to +70°C
–40 to +85°C
–40 to +125°C
0 to +70°C
–40 to +85°C
–40 to +125°C
0 to +70°C
–40 to +85°C
–40 to +125°C
0 to +70°C
–40 to +85°C
–40 to +125°C
Output high voltage; port 0 in external bus mode
Logical 0 input current, ports 1, 2, 3,
except P1.6/SCL, P1.7/SDA
0 to +70°C
–40 to +85°C
–40 to +125°C
IOL = 1.6mA8, 9
IOL = 3.2mA8, 9
IOL = 3.0mA
IOH = –60µA
IOH = –25µA
IOH = –10µA
IOH = –800µA
IOH = –300µA
IOH = –80µA
VIN = 0.45V
–0.5
–0.5
–0.5
0.2VDD–0.1
V
0.2VDD–0.15 V
0.2VDD–0.25 V
–0.5
–0.5
–0.5
0.2VDD–0.3
V
0.2VDD–0.35 V
0.2VDD–0.45 V
–0.5
0.3VDD
V
0.2VDD+0.9 VDD+0.5
V
0.2VDD+1.0 VDD+0.5
V
0.2VDD+1.0 VDD+0.5
V
0.7VDD
VDD+0.5
V
0.7VDD+0.1 VDD+0.5
V
0.7VDD+0.1 VDD+0.5
V
0.7VDD
6.0
V
0.45
V
0.45
V
0.4
V
2.4
V
0.75VDD
V
0.9VDD
V
2.4
V
0.75VDD
V
0.9VDD
V
–50
µA
–75
µA
–75
µA
ITL
Logical 1-to-0 transition current, ports 1, 2, 3,
0 to +70°C
See note 7
except P1.6/SCL, P1.7/SDA
–40 to +85°C
–40 to +125°C
–650
µA
–750
µA
–750
µA
IL1
Input leakage current, port 0, EA
IL2
Input leakage current, P1.6/SCL, P1.7/SDA
IDD
Power supply current:
Active mode @ 16MHz2, 11
Active mode @ 24MHz2, 11
Idle mode @ 16MHz3, 11
Idle mode @ 24MHz3, 11
Power down mode4, 5
Power down mode4, 5
0.45V < VI < VDD
0V < VI < 6.0V
0V < VDD < 6.0V
See note 1
VDD=5.5V
VDD=5.5V
–40 to +125°C
±10
µA
±10
µA
µA
28.0
mA
35.0
mA
6
mA
7
mA
50
µA
100
µA
RRST Internal reset pull-down resistor
50
150
kΩ
CIO
Pin capacitance
Freq.=1MHz
10
pF
NOTES:
1. See Figures 9 through 11 for IDD test conditions.
2. The operating supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 5ns;
VIL = VSS + 0.5V; VIH = VDD –0.5V; XTAL2 not connected; EA = RST = Port 0 = P1.6 = P1.7 = VDD. See Figure 9.
3. The idle mode supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 5ns; VIL = VSS + 0.5V;
VIH = VDD –0.5V; XTAL2 not connected; Port 0 = P1.6 = P1.7 = VDD; EA = RST = VSS. See Figure 10.
4. The power-down current is measured with all output pins disconnected; XTAL2 not connected; Port 0 = P1.6 = P1.7 = VDD;
EA = RST = VSS. See Figure 11.
5. 2V ≤ VPD ≤ VDDmax.
6. The input threshold voltage of P1.6 and P1.7 (SIO1) meets the I2C specification, so an input voltage below 0.3VDD will be recognized as a
logic 0 while an input voltage above 0.7VDD will be recognized as a logic 1.
1998 Jan 06
10