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74HC3G34 Datasheet, PDF (10/16 Pages) NXP Semiconductors – Triple Buffer Gate
Philips Semiconductors
Triple buffer gate
AC WAVEFORMS
Product specification
74HC3G34; 74HCT3G34
handbook, halfpagVeI
nA input
GND
VOH
nY output
VOL
VM
t PHL
VM
t THL
VM
VM
10%
t PLH
90%
t TLH
MNA746
For 74HC3G: VM = 50%; VI = GND to VCC.
For 74HCT3G: VM = 1.3 V; VI = GND to 3.0 V.
Fig.4 The input (nA) to output (nY) propagation delays and the output transition times.
handbook, full pagewidth
VCC
VI
PULSE
GENERATOR
VO
D.U.T.
RT
S1
RL =
1 kΩ
VCC
open
GND
CL =
50 pF
MNA742
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
open
VCC
GND
2003 May 19
Definitions for test circuit:
RL = Load resistor.
CL = load capacitance including jig and probe capacitance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.5 Load circuitry for switching times.
10