74HC194 Datasheet, PDF (10/10 Pages) NXP Semiconductors – 4-bit bidirectional universal shift register

Philips Semiconductors
4-bit bidirectional universal shift register
AC WAVEFORMS
Product specification
74HC/HCT194
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7
Waveforms showing the clock (CP) to
output (Q_n) propagation delays, the clock
pulse width, the output transition times and
the maximum clock frequency.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8
Waveforms showing the master reset (MR)
pulse width, the master reset to output (Q_n)
propagation delays and the master reset to
clock (CP) removal time.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.9 Waveforms showing the set-up and hold
times from the data inputs (D_n, D_SR and
D_SL) to the clock (CP).
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.10 Waveforms showing the set-up and hold
times from the mode control inputs (S_n) to
the clock input (CP).
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
10