PHKD3NQ10T Datasheet, PDF (1/7 Pages) NXP Semiconductors – Dual N-channel TrenchMOS transistor

Philips Semiconductors
Dual N-channel TrenchMOS^TM transistor
Product specification
PHKD3NQ10T
FEATURES
• Dual device
• Low on-state resistance
• Fast switching
• Low profile surface mount
package
SYMBOL
d1
d2
g1
g2
s1
s2
QUICK REFERENCE DATA
V_DS = 100 V
I_D = 3 A
R_DS(ON) ≤ 90 mΩ (V_GS = 10 V)
GENERAL DESCRIPTION
Dual N-channel enhancement
mode field-effect transistor in a
plastic envelope using ’trench’
technology.
Applications:-
• Motor and relay drivers
• d.c. to d.c. converters
The PHKD3NQ10T is supplied in
the SOT96-1 (SO8) surface
mounting package.
PINNING
PIN
DESCRIPTION
1 source 1
2 gate 1
3 source 2
4 gate 2
5,6 drain 2
7,8 drain 1
SOT96-1
876 5
pin 1 index
123 4
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
V_DS
V_DGR
V_GS
I_D
I_D
I_DM
P_tot
T_stg, T_j
Continuous drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current per MOSFET
Drain current per MOSFET (both
MOSFETs conducting)
Drain current (pulse peak value per
MOSFET)
Total power dissipation
Storage & operating temperature
T_j = 25 ˚C to 150˚C
T_j = 25 ˚C to 150˚C;
R_GS = 20 kΩ
T_a = 25 ˚C, t ≤ 10 s
T_a = 70 ˚C, t ≤ 10 s
T_a = 25 ˚C, t ≤ 10 s
T_a = 70 ˚C, t ≤ 10 s
T_a = 25 ˚C
T_a = 25 ˚C, t ≤ 10 s
T_a = 70 ˚C, t ≤ 10 s
MIN.
-
-
-
-
-
-
-
-
-
-
- 65
MAX.
100
100
± 20
3
2.4
2.2
1.7
12
2
1.3
150
UNIT
V
V
V
A
A
A
A
A
W
W
˚C
THERMAL RESISTANCES
SYMBOL PARAMETER
R_{th j-a}
R_{th j-a}
Thermal resistance junction
to ambient
Thermal resistance junction
to ambient
CONDITIONS
Surface mounted on FR4 board, t ≤ 10
sec; either or both MOSFETs conducting
Surface mounted on FR4 board; either or
both MOSFETs conducting
TYP.
-
150
MAX.
62.5
-
UNIT
K/W
K/W
August 1999
1
Rev 1.000