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PHK5NQ10T Datasheet, PDF (1/7 Pages) NXP Semiconductors – N-channel TrenchMOS transistor | |||
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Philips Semiconductors
N-channel TrenchMOSTM transistor
Product specification
PHK5NQ10T
FEATURES
⢠Low on-state resistance
⢠Fast switching
⢠Low profile surface mount
package
SYMBOL
d
g
s
QUICK REFERENCE DATA
VDS = 100 V
ID = 5 A
RDS(ON) ⤠50 m⦠(VGS = 10 V)
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect transistor in a plastic
envelope
using
âtrenchâ
technology.
Applications:-
⢠Motor and relay drivers
⢠d.c. to d.c. converters
The PHK5NQ10T is supplied in the
SOT96-1 (SO8) surface mounting
package.
PINNING
PIN
DESCRIPTION
1-3 source
4 gate
5-8 drain
SOT96-1 (SO8)
876 5
pin 1 index
123 4
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
Ptot
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (tp ⤠10 s)
Drain current (pulse peak value)
Total power dissipation
Operating junction and storage
temperature
Tj = 25 ËC to 150ËC
Tj = 25 ËC to 150ËC;
RGS = 20 kâ¦
Ta = 25 ËC
Ta = 70 ËC
Ta = 25 ËC
Ta = 25 ËC, t ⤠10 s
Ta = 70 ËC, t ⤠10 s
MIN.
-
-
-
-
-
-
-
-
- 65
MAX.
100
100
± 20
5
3.6
20
2.5
1.6
150
UNIT
V
V
V
A
A
A
W
W
ËC
THERMAL RESISTANCES
SYMBOL PARAMETER
Rth j-a
Rth j-a
Thermal resistance junction
to ambient
Thermal resistance junction
to ambient
CONDITIONS
Surface mounted, FR4 board, t ⤠10 sec
Surface mounted, FR4 board
TYP.
-
150
MAX.
50
-
UNIT
K/W
K/W
August 1999
1
Rev 1.000
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