PHK4NQ10T Datasheet, PDF (1/7 Pages) NXP Semiconductors – N-channel TrenchMOS transistor

Philips Semiconductors
N-channel TrenchMOS^TM transistor
Product specification
PHK4NQ10T
FEATURES
• Low on-state resistance
• Fast switching
• Low profile surface mount
package
SYMBOL
d
g
s
QUICK REFERENCE DATA
V_DS = 100 V
I_D = 4 A
R_DS(ON) ≤ 70 mΩ (V_GS = 10 V)
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect transistor in a plastic
envelope
using
’trench’
technology.
Applications:-
• Motor and relay drivers
• d.c. to d.c. converters
The PHK4NQ10T is supplied in the
SOT96-1 (SO8) surface mounting
package.
PINNING
PIN
DESCRIPTION
1-3 source
4 gate
5-8 drain
SOT96-1 (SO8)
876 5
pin 1 index
123 4
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
V_DSS
V_DGR
V_GS
I_D
I_DM
P_tot
T_j, T_stg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (t_p ≤ 10 s)
Drain current (pulse peak value)
Total power dissipation
Operating junction and storage
temperature
T_j = 25 ˚C to 150˚C
T_j = 25 ˚C to 150˚C;
R_GS = 20 kΩ
T_a = 25 ˚C
T_a = 70 ˚C
T_a = 25 ˚C
T_a = 25 ˚C, t ≤ 10 s
T_a = 70 ˚C, t ≤ 10 s
MIN.
-
-
-
-
-
-
-
-
- 65
MAX.
100
100
± 20
4
3
16
2.5
1.6
150
UNIT
V
V
V
A
A
A
W
W
˚C
THERMAL RESISTANCES
SYMBOL PARAMETER
R_{th j-a}
R_{th j-a}
Thermal resistance junction
to ambient
Thermal resistance junction
to ambient
CONDITIONS
Surface mounted, FR4 board, t ≤ 10 sec
Surface mounted, FR4 board
TYP.
-
150
MAX.
50
-
UNIT
K/W
K/W
August 1999
1
Rev 1.000