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PEMD12_PUMD12_15 Datasheet, PDF (1/16 Pages) NXP Semiconductors – NPN/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k | |||
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PEMD12; PUMD12
NPN/PNP resistor-equipped transistors;
R1 = 47 kï, R2 = 47 kï
Rev. 4 â 21 November 2011
Product data sheet
1. Product profile
1.1 General description
NPN/PNP double Resistor-Equipped Transistors (RET) in Surface-Mounted
Device (SMD) plastic packages.
Table 1. Product overview
Type number Package
NXP
JEITA
PEMD12
SOT666 -
PUMD12
SOT363 SC-88
PNP/PNP
complement
PEMB2
PUMB2
NPN/NPN
complement
PEMH2
PUMH2
Package
configuration
ultra small and flat
lead
very small
1.2 Features and benefits
ï® 100 mA output current capability
ï® Built-in bias resistors
ï® Simplifies circuit design
ï® Reduces component count
ï® Reduces pick and place costs
ï® AEC-Q101 qualified
1.3 Applications
ï® Low current peripheral driver
ï® Control of IC inputs
ï® Replaces general-purpose transistors in digital applications
1.4 Quick reference data
Table 2. Quick reference data
Symbol Parameter
Conditions
Min Typ
Per transistor; for the PNP transistor (TR2) with negative polarity
VCEO
IO
R1
collector-emitter voltage
output current
bias resistor 1 (input)
open base
-
-
-
-
33
47
R2/R1
bias resistor ratio
0.8
1
Max Unit
50
V
100 mA
61
kï
1.2
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