English
Language : 

PCA9545APW Datasheet, PDF (1/27 Pages) NXP Semiconductors – 4-channel I2C switch with interrupt logic and reset
PCA9545A
4-channel I2C switch with interrupt logic and reset
Rev. 03 — 3 March 2005
Product data sheet
1. General description
The PCA9545A is a quad bi-directional translating switch controlled via the I2C-bus. The
SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual
SCx/SDx channel or combination of channels can be selected, determined by the
contents of the programmable control register. Four interrupt inputs, INT0 to INT3, one for
each of the downstream pairs, are provided. One interrupt output, INT, acts as an AND of
the four interrupt inputs.
An active LOW reset input allows the PCA9545A to recover from a situation where one of
the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the
I2C-bus state machine and causes all the channels to be deselected as does the internal
Power-on reset function.
The pass gates of the switches are constructed such that the VDD pin can be used to limit
the maximum high voltage which will be passed by the PCA9545A. This allows the use of
different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts can communicate
with 5 V parts without any additional protection. External pull-up resistors pull the bus up
to the desired voltage level for each channel. All I/O pins are 5 V tolerant.
2. Features
s 1-of-4 bi-directional translating switches
s I2C-bus interface logic; compatible with SMBus standards
s 4 active LOW interrupt inputs
s Active LOW interrupt output
s Active LOW reset input
s 2 address pins allowing up to 4 devices on the I2C-bus
s Channel selection via I2C-bus, in any combination
s Power-up with all switch channels deselected
s Low Ron switches
s Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
s No glitch on power-up
s Supports hot insertion
s Low stand-by current
s Operating power supply voltage range of 2.3 V to 5.5 V
s 5 V tolerant Inputs
s 0 kHz to 400 kHz clock frequency
s ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
s Latch-up protection exceeds 100 mA per JESD78