P89LV51RB2 Datasheet, PDF (1/77 Pages) NXP Semiconductors – 8-bit 80C51 3 V low power 16/32/64 kB Flash microcontroller with 1 kB RAM

P89LV51RB2/RC2/RD2
8-bit 80C51 3 V low power 16/32/64 kB Flash microcontroller
with 1 kB RAM
Rev. 04 — 02 December 2004
Product data
1. General description
The P89LV51RB2/RC2/RD2 are 80C51 microcontrollers with 16/32/64 kB Flash and
1024 bytes of data RAM.
A key feature of the P89LV51RB2/RC2/RD2 is its X2 mode option. The design
engineer can choose to run the application with the conventional 80C51 clock rate
(12 clocks per machine cycle) or select the X2 mode (6 clocks per machine cycle) to
achieve twice the throughput at the same clock frequency. Another way to benefit
from this feature is to keep the same performance by reducing the clock frequency by
half, thus dramatically reducing the EMI.
The Flash program memory supports both parallel programming and in serial
In-System Programming (ISP). Parallel programming mode offers gang-programming
at high speed, reducing programming costs and time to market. ISP allows a device
to be reprogrammed in the end product under software control. The capability to
field/update the application firmware makes a wide range of applications possible.
The P89LV51RB2/RC2/RD2 is also In-Application Programmable (IAP), allowing the
Flash program memory to be reconfigured even while the application is running.
2. Features
s 80C51 Central Processing Unit
s 3 V Operating voltage from 0 MHz to 33 MHz
s 16/32/64 kB of on-chip Flash program memory with ISP (In-System
Programming) and IAP (In-Application Programming)
s Supports 12-clock (default) or 6-clock mode selection via software or ISP
s SPI (Serial Peripheral Interface) and enhanced UART
s PCA (Programmable Counter Array) with PWM and Capture/Compare functions
s Four 8-bit I/O ports with three high-current Port 1 pins (16 mA each)
s Three 16-bit timers/counters
s Programmable Watchdog timer (WDT)
s Eight interrupt sources with four priority levels
s Second DPTR register
s Low EMI mode (ALE inhibit)
s TTL- and CMOS-compatible logic levels