P89LPC932 Datasheet, PDF (1/60 Pages) NXP Semiconductors – 80C51 8-bit microcontroller with two-clock core 8 KB 3 V low-power Flash with 512-byte data EEPROM

P89LPC932
8-bit microcontroller with accelerated two-clock 80C51 core
8 kB Flash with 512-byte data EEPROM and 768-byte RAM
Rev. 04 — 06 January 2004
Product data
1. General description
The P89LPC932 is a single-chip microcontroller, available in low cost packages,
based on a high performance processor architecture that executes instructions in two
to four clocks, six times the rate of standard 80C51 devices. Many system-level
functions have been incorporated into the P89LPC932 in order to reduce component
count, board space, and system cost.
2. Features
s A high performance 80C51 CPU provides instruction cycle times of 167-333 ns for
all instructions except multiply and divide when executing at 12 MHz. This is
6 times the performance of the standard 80C51 running at the same clock
frequency. A lower clock frequency for the same performance results in power
savings and reduced EMI.
s 2.4 V to 3.6 V V_DD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
s 8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable page size.
s 256-byte RAM data memory. 512-byte auxiliary on-chip RAM.
s 512-byte customer Data EEPROM on chip allows serialization of devices, storage
of set-up parameters, etc.
s Two 16-bit counter/timers. Each timer may be configured to toggle a port output
upon timer overflow or to become a PWM output.
s Real-Time clock that can also be used as a system timer.
s Capture/Compare Unit (CCU) provides PWM, input capture, and output compare
functions.
s Two analog comparators with selectable inputs and reference source.
s Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities.
s 400 kHz byte-wide I²C-bus communication port.
s SPI communication port.
s Eight keypad interrupt inputs, plus two additional external interrupt inputs.
s Four interrupt priority levels.
s Watchdog timer with separate on-chip oscillator, requiring no external
components. The watchdog prescaler is selectable from 8 values.
s Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent
spurious and incomplete resets. A software reset function is also available.
s Low voltage reset (Brownout detect) allows a graceful system shutdown when
power fails. May optionally be configured as an interrupt.