P89LPC904 Datasheet, PDF (1/41 Pages) NXP Semiconductors – 8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable Flash with 8-bit A/D converter

P89LPC904
8-bit microcontrollers with two-clock accelerated 80C51 core
1 kB 3 V byte-erasable Flash with 8-bit A/D converter
Rev. 02 — 25 June 2004
Preliminary data
1. General description
The P89LPC904 is a single-chip microcontroller in a low-cost 8-pin package based
on a high performance processor architecture that executes instructions in two to four
clocks, six times the rate of standard 80C51 devices. Many system-level functions
have been incorporated into the P89LPC904 in order to reduce component count,
board space, and system cost.
2. Features
2.1 Principal features
s 1 kB byte-erasable Flash code memory organized into 256-byte sectors and
16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile
data storage.
s 128-byte RAM data memory.
s Two 16-bit counter/timers.
s 23-bit system timer that can also be used as a Real-Time clock.
s 2 -input multiplexed A/D converter/single DAC output. Two analog comparators
with selectable reference.
s Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities.
s High-accuracy internal RC oscillator option allows operation without external
oscillator components. The RC oscillator option is selectable and fine tunable.
s 2.4 V to 3.6 V V_DD operating range with 5 V tolerant I/O pins (may be pulled up or
driven to 5.5 V). Industry-standard pinout with V_DD, V_SS, and reset at locations 1,
8, and 4.
s Up to six I/O pins when using internal oscillator and reset options.
s 8-pin SO-8 package.
2.2 Additional features
s A high performance 80C51 CPU provides instruction cycle times of 167 ns to
333 ns for all instructions except multiply and divide when executing at 12 MHz.
This is six times the performance of the standard 80C51 running at the same
clock frequency. A lower clock frequency for the same performance results in
power savings and reduced EMI.
s In-Application Programming (IAP-Lite) and byte erase allows code memory to be
used for non-volatile data storage.