NE5537 Datasheet, PDF (1/8 Pages) NXP Semiconductors – Sample-and-hold amplifier

Philips Semiconductors Linear Products
Sample-and-hold amplifier
Product specification
NE/SE5537
DESCRIPTION
The NE5537 monolithic sample-and-hold amplifier combines the
best features of ion-implanted JFETs with bipolar devices to obtain
high accuracy, fast acquisition time, and low droop rate. This device
is pin-compatible with the LF198, and features superior performance
in droop rate and output drive capability. The circuit shown in Figure
1 contains two operational amplifiers which function as a unity gain
amplifier in the sample mode. The first amplifier has bipolar input
transistors which give the system a low offset voltage. The second
amplifier has JFET input transistors to achieve low leakage current
from the hold capacitor. A unique circuit design for leakage current
cancellation using current mirrors gives the NE5537 a low droop
rate at higher temperature. The output stage has the capability to
drive a 2kΩ load. The logic input is compatible with TTL, PMOS or
CMOS logic. The differential logic threshold is 1.4V with the sample
mode occurring when the logic input is high. It is available in 8-lead
TO-5, 8-pin plastic DIP packages, and 14-pin SO packages.
FEATURES
• Operates from ±5V to ±18V supplies
• Hold leakage current 6pA @ T_J = 25°C
• Less than 4µs acquisition time
• TTL, PMOS, CMOS compatible logic input
• 0.5mV typical hold step at CH=0.01µF
• Low input offset: 1MV (typical)
• 0.002% gain accuracy with R_L=2kΩ
• Low output noise in hold mode
• Input characteristics do not change during hold mode
• High supply rejection ratio in sample or hold
• Wide bandwidth
PIN CONFIGURATIONS
FE and N Packages
V+ ¹
OFFSET ADJUST ²
INPUT ³
V– ⁴
8 _LOGIC
7 _{LOGIC REFERENCE}
6 _Ch
5 _OUTPUT
D¹ Package
INPUT ¹
NC ²
V– ³
NC ⁴
NC ⁵
NC ⁶
OUTPUT ⁷
14 _{VOS ADJ}
13 _NC
12 _V+
11 _LOGIC
10 LOGIC REFERENCE
9 _NC
8 _Ch
NOTE:
1. SO and non-standard pinouts.
BLOCK DIAGRAM
OFFSET
2
–
3
INPUT
+
LOGIC ⁸
–
7
LOGIC
+
REFERENCE
30k
5
OUTPUT
300
6
HOLD
CAPACITOR
ORDERING INFORMATION
DESCRIPTION
8-Pin Plastic Dual In-Line Package (DIP)
14-Pin Plastic Small Outline (SO) Package
8-Pin Plastic Dual In-Line Package (DIP)
TEMPERATURE RANGE
0 to +70°C
0 to +70°C
-55°C to +125°C
ORDER CODE
NE5537N
NE5537D
SE5537FE
DWG #
0404B
0175D
0404B
August 31, 1994
884
853-1044 13721