LPC82X_15 Datasheet, PDF(1/81 Page) NXP Semiconductors – 32-bit ARM Cortex-M0+ microcontroller; up to 32 kB flash and 8 kB SRAM; 12-bit ADC; comparator

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LPC82X_15 Datasheet, PDF (1/81 Pages) NXP Semiconductors – 32-bit ARM Cortex-M0+ microcontroller; up to 32 kB flash and 8 kB SRAM; 12-bit ADC; comparator

LPC82x

32-bit ARM Cortex-M0+ microcontroller; up to 32 kB flash and

8 kB SRAM; 12-bit ADC; comparator

Rev. 1 â 1 October 2014

Product data sheet

1. General description

The LPC82x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at

CPU frequencies of up to 30 MHz. The LPC82x support up to 32 KB of flash memory and

8 KB of SRAM.

The peripheral complement of the LPC82x includes a CRC engine, four I2C-bus

interfaces, up to three USARTs, up to two SPI interfaces, one multi-rate timer,

self-wake-up timer, and state-configurable timer with PWM function (SCTimer/PWM), a

DMA, one 12-bit ADC and one analog comparator, function-configurable I/O ports through

a switch matrix, an input pattern match engine, and up to 29 general-purpose I/O pins.

For additional documentation related to the LPC82x parts, see Section 18.

2. Features and benefits

ï® System:

ïµ ARM Cortex-M0+ processor (revision r0p1), running at frequencies of up to

30 MHz with single-cycle multiplier and fast single-cycle I/O port.

ïµ ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).

ïµ System tick timer.

ïµ AHB multilayer matrix.

ïµ Serial Wire Debug (SWD) with four break points and two watch points. JTAG

boundary scan (BSDL) supported.

ïµ MTB

ï® Memory:

ïµ Up to 32 KB on-chip flash programming memory with 64 Byte page write and

erase. Code Read Protection (CRP) supported.

ïµ 8 KB SRAM.

ï® ROM API support:

ïµ Boot loader.

ïµ On-chip ROM APIs for ADC, SPI, I2C, USART, power configuration (power

profiles) and integer divide.

ïµ Flash In-Application Programming (IAP) and In-System Programming (ISP).

ï® Digital peripherals:

ïµ High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 29

General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors,

programmable open-drain mode, input inverter, and digital filter. GPIO direction

control supports independent set/clear/toggle of individual bits.

ïµ High-current source output driver (20 mA) on four pins.

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