LPC2292_07 Datasheet, PDF (1/54 Pages) NXP Semiconductors – 16/32-bit ARM microcontrollers; 256 kB ISP/IAP flash with CAN, 10-bit ADC and external memory interface

LPC2292/2294
16/32-bit ARM microcontrollers; 256 kB ISP/IAP flash with
CAN, 10-bit ADC and external memory interface
Rev. 06 — 10 December 2007
Product data sheet
1. General description
The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with
real-time emulation and embedded trace support, together with 256 kB of embedded
high-speed flash memory. A 128-bit wide memory interface and a unique accelerator
architecture enable 32-bit code execution at the maximum clock rate. For critical code size
applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with
minimal performance penalty.
With their 144-pin package, low power consumption, various 32-bit timers, 8-channel
10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine
external interrupt pins these microcontrollers are particularly suitable for automotive and
industrial control applications as well as medical systems and fault-tolerant maintenance
buses. The number of available fast GPIOs ranges from 76 (with external memory)
through 112 (single-chip). With a wide range of additional serial communications
interfaces, they are also suited for communication gateways and protocol converters as
well as many other general-purpose applications.
Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with
and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from
other devices only when necessary.
2. Features
2.1 Key features brought by LPC2292/2294/01 devices
I Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device.
They also allow for a port pin to be read at any time regardless of its function.
I Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are
5 V tolerant when configured for digital I/O function(s).
I UART0/1 include fractional baud rate generator, auto-bauding capabilities and
handshake flow-control fully implemented in hardware.
I Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats.
I SPI programmable data length and master mode enhancement.
I Diversified Code Read Protection (CRP) enables different security levels to be
implemented. This feature is available in LPC2292/2294/00 devices as well.
I General purpose timers can operate as external event counters.
2.2 Key features common for all devices
I 16/32-bit ARM7TDMI-S microcontroller in a LQFP144 package.