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HEF4051BT-Q100 Datasheet, PDF (1/21 Pages) NXP Semiconductors – 8-channel analog multiplexer/demultiplexer
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
Rev. 2 — 11 September 2014
Product data sheet
1. General description
The HEF4051B-Q100 is an 8-channel analog multiplexer/demultiplexer with three
address inputs (S1 to S3), an active LOW enable input (E), eight independent
inputs/outputs (Y0 to Y7) and a common input/output (Z). The device contains eight
bidirectional analog switches, each with one side connected to an independent
input/output (Y0 to Y7) and the other side connected to a common input/output (Z). With
E LOW, one of the eight switches is selected (low-impedance ON-state) by S1 to S3. With
E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3. If
break before make is needed, then it is necessary to use the enable input.
VDD and VSS are the supply voltage connections for the digital control inputs (S1 to S3,
and E). The VDD to VSS range is 3 V to 15 V. The analog inputs/outputs (Y0 to Y7, and Z)
can swing between VDD as a positive limit and VEE as a negative limit. VDD  VEE may not
exceed 15 V. Unused inputs must be connected to VDD, VSS, or another input. For
operation as a digital multiplexer/demultiplexer, VEE is connected to VSS (typically
ground). VEE and VSS are the supply voltage connections for the switches.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Fully static operation
 5 V, 10 V, and 15 V parametric ratings
 Standardized symmetrical output characteristics
 ESD protection:
 MIL-STD-833, method 3015 exceeds 2000V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )
 Complies with JEDEC standard JESD 13-B
3. Applications
 Analog multiplexing and demultiplexing
 Digital multiplexing and demultiplexing
 Signal gating