HEF4050B_15 Datasheet, PDF(1/12 Page) NXP Semiconductors

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HEF4050B_15 Datasheet, PDF (1/12 Pages) NXP Semiconductors – Hex non-inverting buffers

HEF4050B

Hex non-inverting buffers

Rev. 8 â 18 November 2011

Product data sheet

1. General description

The HEF4050B provides six non-inverting buffers with high current output capability

suitable for driving TTL or high capacitive loads. Since input voltages in excess of the

buffersâ supply voltage are permitted, the buffers may also be used to convert logic levels

of up to 15 V to standard TTL levels. Their guaranteed fan-out into common bipolar logic

elements is shown in Table 3.

It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS

(usually ground). Unused inputs must be connected to VDD, VSS, or another input.

2. Features and benefits

ï® Accepts input voltages in excess of the supply voltage

ï® Fully static operation

ï® 5 V, 10 V, and 15 V parametric ratings

ï® Standardized symmetrical output characteristics

ï® Specified from ï40 ï°C to +85 ï°C

ï® Complies with JEDEC standard JESD 13-B

3. Applications

ï® LOCMOS (Local Oxidation CMOS) to DTL/TTL converter

ï® HIGH sink current for driving two TTL loads

ï® HIGH-to-LOW level logic conversion

4. Ordering information

Table 1. Ordering information

All types operate from ï40 ï°C to +85 ï°C.

Type number Package

Name

Description

HEF4050BP

DIP16

plastic dual in-line package; 16 leads (300 mil)

HEF4050BT

SO16

plastic small outline package; 16 leads; body width 3.9 mm

Version

SOT38-4

SOT109-1

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